Non-volatile memory with background data latch caching during read operations and methods therefor

Latency of the memory area is a read or write operation data to be input or output from the data latches of the memory through the I / O bus. While the memory core is busy (busy), and the read operation, the memory is provided with a circuit and method for improving the performance of non-volatile memory device by taking a portion of the data caching and transmission operation in the background. A method for caching the read data is executed when to be seonhaengdoe by preemptive read word line image data read out is adjacent to the current word line on the current page, preemptive read in conjunction with any of the I / O access read previously The pre-made in a cycle for reading out the previous page to be performed for the current page is read into a busy I / O access.