Concurrent programming of non-volatile memory

An embodiment of the present invention comprising the steps of: a bit line first value is applied to (A or B in FIG. 12), the transistor of the bit line (Fig. 9 to produce a first condition based on the first value (566 a word line associated with the drain) of a) (Fig. 9 WL0 / WL31) and a common selection line (a step of boosting a source) of Fig. 9 of the transistor 500, and a specific ratio associated with the bit line and a common selection line volatile storage (e.g., 518 of Fig. 9), boundary non-volatile storage elements associated with the common select line so as to maintain the first condition for a (e. g., FIG. 532 9) comprises cut-off the . Applying to a second value and a bit line, a word line of the at least a subset to generate a second condition for the other non-volatile storage element associated with the bit line and a common selection line are boosted. The second condition is based on the second value. The first condition and the second condition overlap in time. A non-volatile storage devices are all programmed at the same time in accordance with their associated conditions.