AT484023T

Apparatus and method to avoid floating point control instructions in floating point to integer conversion

Abstract

The binary system convert module of the source system structure associate's first command sequences switch is smaller than and target system structure the second command sequences of associate. The first sequence comprises one or multiple the control command, and second sequence and by hand comprises a floating control command. Is on conforming to target system structure processor the executing second sequence generating the result layer with a on conforming to supply system structure the processor the executing first sequence generating the result of the.

Term

No projected expiry on record.

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11 members in 6 offices

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Priority claims
DocumentOfficeKindDate
74330703United States of AmericaA
2004041849United States of AmericaW

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US2005138608A1United States of AmericaA1
WO2005066777A2World Intellectual Property Organization (WIPO)A2
WO2005066777A3World Intellectual Property Organization (WIPO)A3
EP1700208A2European Patent Office (EPO)A2
CN1894665AChinaA
US7380240B2United States of AmericaB2
EP1700208B1European Patent Office (EPO)B1
AT484023TThis recordAustriaT
ATE484023T1AustriaT1
DE602004029499D1GermanyD1
CN1894665BChinaB