Managing multiprocessor operations

The management multi-processor operation, the first processor redundant reading cache line, the cache line of caches resource the line of cache wireless memory, the first processor and second processor sharing two. According to the cache coherence protocol, a uniformity between the shared buffer memory wire and cache wire. At the same time, redundancy cache and reading with taken the first processor, and forbids the first processor is access the shared resource. On the handle, when the second processor in claims an operation of the shared resource, the second processor is connected with the buffer shared storage line shell, data in parallel to the first processor shared resource can be connected with a signal information the first processor access. And the vehicle, wherein the first processor are provided with the cache coherence protocol change of cache line state, and reading is connected with the data of the second processor with a. With the described embodiments, and device of claims.