AT386328T

Noise reduction technique for transistors and small devices utilizing an episodic agitation

Abstract

The invention provides multiple for reducing a non-volatile storage's the internal noise measuring method, and other method by a digression driver (e.g., a time variation voltage) exert terminals one or multiple terminals of unit as the reading process part to reduce the noise. Aspects of the invention is connected with a non-volatile memory and device. According to the invention's surface, and exerted unit as the process of the normal voltage level part, further - exerting a time variation voltage on the unit. A group implements the is a t-shaped or more groups of alternating voltage of the single units flow of the reading process signal integrated or time during integrated time to the floating grid storage unit one or multiple terminals and. The other embodiments, and other renewable outsides or a data port; the driving of complex, wherein the average influence (of the time to the integrated time) and a to enable wherein with a reducing noise effect of constantly.

Term

No projected expiry on record.

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22 members in 10 offices

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5292402United States of AmericaA

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US2003137877A1United States of AmericaA1
WO03063171A2World Intellectual Property Organization (WIPO)A2
TW200302489ATaiwan Province of ChinaA
AU2002357265A1AustraliaA1
WO03063171A3World Intellectual Property Organization (WIPO)A3
KR20040081462ARepublic of KoreaA
EP1466331A2European Patent Office (EPO)A2
US6850441B2United States of AmericaB2
US2005057979A1United States of AmericaA1
CN1623206AChinaA
JP2005520270AJapanA
US7092292B2United States of AmericaB2
TWI264016BTaiwan Province of ChinaB
US2006239079A1United States of AmericaA1
EP1466331B1European Patent Office (EPO)B1
AT386328TThis recordAustriaT
DE60225068D1GermanyD1
US7403421B2United States of AmericaB2
DE60225068T2GermanyT2
CN100520980CChinaC
JP4326339B2JapanB2
KR100953373B1Republic of KoreaB1