AT375552T

Pipelines of multithreaded processor cores for packet processing

Abstract

The invention claims a method for parallel multi-thread processing method thereof. The method comprises a using comprises a task distribution of processing arranged respond the assembly lines of programmable engine to the programmable engine and programming platform. The method is comprising is arranged is a duty context of the programmable a given, and a such as CAM cache memory for software control order to stationing of the programmable a shifting the data between the registers.

Term

No projected expiry on record.

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19 members in 11 offices

This recordMember, by publication datePriority claim1 more office is in the list below

Priority claims1

Priority claims
DocumentOfficeKindDate
5772302United States of AmericaA

Members19

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DocumentOfficeKind
US2003145173A1United States of AmericaA1
CA2473551A1CanadaA1
WO03065207A2World Intellectual Property Organization (WIPO)A2
AU2003209290A1AustraliaA1
TW200307214ATaiwan Province of ChinaA
KR20040017251ARepublic of KoreaA
WO03065207A3World Intellectual Property Organization (WIPO)A3
EP1481323A2European Patent Office (EPO)A2
TWI231914BTaiwan Province of ChinaB
HK1072298A1Hong Kong, ChinaA1
CN1820253AChinaA
KR100613923B1Republic of KoreaB1
US7181594B2United States of AmericaB2
EP1481323B1European Patent Office (EPO)B1
AT375552TThis recordAustriaT
DE60316774D1GermanyD1
DE60316774T2GermanyT2
CN100440151CChinaC
CA2473551CCanadaC