AT303674T

High-speed, high-resolution and low-consumption analog/digital converter with single-ended input

Abstract

A binary-coded weighting the first array of sampling capacitor (standard ') and capacitor is connected; the first common node circuit (NB+) and is substrates to charge is substrates of the change-over signal seat (Gnd) voltage (p4) input terminals, and has a choices and secondary differential a terminal (Vrefp, Vrefm) are according to BAR and technology. At the same time, equal to the first array, and port and second node (NB-) connected second array (10B ') and capacitor with the selecting connected (Gnd) and low voltage differential terminal (Vrefm). Two nodes are connected comparer (23 ') are input. The logical unit (17 ') to preset timing control program two arrays the connection of capacitor, and a comparator (23 ') function of output. Although the converter is a single-end output, wherein the behaviour is similar to a a converter of differential input 20, therefore comprising a very good interference rejection to noise. Additionally, wherein no need the capacitor or a special positive keen. Therefore, wherein the low-power consumption and high speed, of which one of a part of integrated circuits' very small area.

Term

No projected expiry on record.

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13 members in 7 offices

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Priority claims
DocumentOfficeKindDate
RM20010407ItalyA
0206487European Patent Office (EPO)W

Members13

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DocumentOfficeKind
ITRM20010407D0ItalyD0
ITRM20010407A1ItalyA1
WO03007479A1World Intellectual Property Organization (WIPO)A1
EP1405419A1European Patent Office (EPO)A1
CN1526202AChinaA
US2004233093A1United States of AmericaA1
US6897801B2United States of AmericaB2
EP1405419B1European Patent Office (EPO)B1
AT303674TThis recordAustriaT
ATE303674T1AustriaT1
DE60205909D1GermanyD1
DE60205909T2GermanyT2
CN1526202BChinaB