Method of manufacture of an integrated circuit

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AUSTRIAN

PATENT OFFICE

PATENT NUMBER NO. 262383

Class: 21 a, 10

Int. Cl.

H 01 1

Issue Date: June 10, 1968

CENTER ELECTRONIQUE HÜRLOGER SA IN NEUENBURG (SWITZERLAND)

Method for producing an integrated circuit

Registered January 23, 1967 (A 643/67); Priority of the application in Switzerland of 31 January 1966 (No 1268/66) claimed.

Start of patent term: September 15, 1967.

The invention relates to a method of manufacturing an integrated circuit starting from a small, monocrystalline silicon plate, an insulating SiO₂Layer and a layer of polycrystalline silicon with the aid of reactants H_z/ SiH_nX_m wherein X consists of one of the elements Cl, Br, J, and n and m are between 0 and 4, with the condition n + m = 4, whereupon a part of the monocrystalline silicon is removed.

It has been found that the small plates made by deposition of polycrystalline silicon on monocrystalline silicon, wherein a SiO₂Layer is interposed, more or less bend once the excess of monocrystalline silicon has been removed. This effect is very troublesome for the application of photolithographic methods and substantially reduces the number of usable circuits obtained.

Experience has shown that the curvature of the small silicon plates is less pronounced when the polycrystalline silicon deposition is fine-grained and is performed at a relatively high deposition rate, eg, 5-10 μ / min. An increased deposition rate simultaneously reduces any damage to the insulating SiO₂-Layer.

The fine-grained polycrystalline silicon tends to recrystallize, u.zw. either partially already during the deposition, which occurs at temperatures between 975 and 1250 ° C, or during the various thermal operations at high temperatures following the deposition of the polycrystalline silicon. It is believed that this recrystallization creates stresses that deform and curl the small plates once the monocrystalline silicon has been removed.

Therefore, in order to avoid deformation of the small plates, it is desirable to prevent or at least greatly retard recrystallization of the polycrystalline silicon.

The inventive method is characterized in that the mixture of reactants H₂/ SiH_nX_m Contain impurities so that the silicon grains form with a degenerate crystalline structure, which prevents recrystallization of the silicon.

With reference to the drawings, embodiments of the method according to the invention are explained in more detail below.

Figs. 1-6 show diagrammatically the first stages of a method of manufacturing an integrated circuit. Fig. 7 shows a device in which the stage shown in Fig. 4 is passed through 30 in which deposition of the polycrystalline silicon layer takes place.

Figs. 8-15 show similar views to Figs. 1-6, but of another embodiment. To make an integrated circuit, one starts from a small plate 1 monocrystalline silicon (Fig.l). With the aid of a Qydmask and photolithographic process, which are not shown in the drawings, silicon is removed by chemical means at locations 2 at which an ionization wall is to be produced (FIG. 2). Then a SiO₂Insulation layer 3 produced by the plate, for example at 900 -1200^ÜC is placed in an oxidizing environment (Figure 3). With the aid of a device shown in FIG. 7, a polycrystalline silicon No. 262383 is subsequently produced²

Layer 4 (Figure 4) deposited by placing the plate in an atmosphere of reactants H * / SiH_nX_m and impurities are heated, thereby forcing the silicon grains to form in a degenerate crystalline structure. Thereafter, the monocrystalline silicon is removed, so that isolated recesses 5 are formed (Fig. 5). Then, an insulating layer 6 is applied, such that the recesses 5 are completely isolated and later can be diffused (Fig. 6).

The deposition of the polycrystalline silicon layer can proceed as shown in FIG. 7. The silicon small plate 7 to be treated is placed on a support 8 of graphite coated with SiO 2 and itself placed in a holder 9 made of quartz. The whole is constructed in a quartz reactor 10 and is heated with a high frequency current flowing through a coil 11. The mixture of reactants H₂/ SiH_nX_m and impurities enter the reactor at 12 and exit at 13. The impurities can be recovered from CO₂, N₂O, volatile oxyhalides of silicon, AlOC1 and mixtures A1C1₃/ CO₂, A1C1₃/ N₂O exist. These impurities have the effect of producing silicon combinations containing oxygen or silicates at the moment of formation of the polycrystalline silicon. Their effectiveness is believed to be attributable to the formation of preferably amorphous layers which encase or penetrate the silicon micrograins.

As impurities, it is also possible to use volatile combinations with cations having an ionic radius which is sufficiently different from silicon, and which cations are incorporated into the crystal lattice of the silicon; these combinations should preferably be electrically active or only weakly active. The elements Sn, Pb, Cu, Fe, Co and Ni can be used.

In order to obtain the small plate shown in FIG. 6, it is also possible, for example, to proceed as follows:

Starting from a small monocrystalline silicon plate (Figure 8), placing an SiO * layer 25 (Figure 9), depositing a polycrystalline silicon layer 4a (Figure 10), grinding and polishing the surface of the monocrystalline silicon (FIG. 11), the monocrystalline silicon except for the SiO.sub.2 layer 3a at locations 2a where it is desired to mount insulation (FIG. 12) removes an SiC.sub.l layer 6a onto the monocrystalline silicon 5a (FIG , 13) on which the latter a polycrystalline silicon layer 7a is applied (FIG. 14), whereupon the first polycrystalline silicon layer 4a is removed (FIG. 15).

Example: A mixture of reactants: H * / SiHCl₃ (0.75-2.5 vol% SiHCl *) are added 0.5 - 5% CO *. The gases flow at a rate of 0.25 to 2.5 m / min over the small plates heated to 975-1250 ° C.