Nova Patents
AT257254T

A cryptographic accelerator

Abstract

(57) A summary code accelerator (1) has a host interface (2) for interfacing with the host who transmits a code demand and receives a result. CPU (3) manages the internal Logical unit of an indexation subsystem (7) which has modular exposition ネンシエータ (30). A maximum of four exposition ネンシエータ (30) are chained with one within Brock (20). Brock (20) of 10 has. A scheduler performs scheduling control using a control register and an input buffer.

Term

No projected expiry on record.

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12 members in 8 offices

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Priority claims
DocumentOfficeKindDate
990878IrelandA
0000132IrelandW

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DocumentOfficeKind
WO0129652A2World Intellectual Property Organization (WIPO)A2
AU7813600AAustraliaA
IE20000841A1IrelandA1
WO0129652A3World Intellectual Property Organization (WIPO)A3
EP1224533A2European Patent Office (EPO)A2
US2002164019A1United States of AmericaA1
JP2003512649AJapanA
EP1224533B1European Patent Office (EPO)B1
AT257254TThis recordAustriaT
ATE257254T1AustriaT1
DE60007543D1GermanyD1
US6963979B2United States of AmericaB2