Emulation system with time-multiplexed interconnect

(57) The hardware emulation system which reduces hardware cost is indicated by carrying out time multipled of the design signal of summary plurality to the pin and printed circuit board of a physical logic chip. The logic system which can reconstruct the present invention is constituted by the logic equipment in which two or more re-programs are possible, and the interworking unit in which two or more re-programs are possible. Interconnection of these logic equipment and interworking units is carried out so that the course of an I/O pin with two or more common design signals and the circuit board may be shared. The logic analyzer for a hardware emulation system is also indicated. A logic circuit required in order to perform the function of a logic analyzer is programmed by the resource in which the program in the logic chip of an emulation system is possible.